The first MROM unit with multi-level cell structure

The first MROM unit with multi-level cell structure Toshiba Corporation has announced the development of the world's first MROM cell to provide better cell current characteristics and no increase in cell size. This progress is achieved through the use of a multi-level cell structure, which also guarantees high-speed operation. Detailed information will be announced during the 2013 Symposia on VLSI Technology and Circuits on June 14th. This seminar will be held in Kyoto, Japan from June 11th to June 14th, 2013. .

The main role of MROM is to store the boot loader or firmware. The MROM density of SoC deployments for digital applications such as smart phones and tablets is increasing year by year. To shorten the access time, it is necessary to halve the size of each generation of MROM cells.

In a typical MROM bit cell (single-layer cell), as SoC process technology advances, manufacturing changes are increasing, and the channel area of ​​the cell transistor is continuously shrinking. As a result, the access time for the 40nm generation has increased over previous generations of processes. Shorter access times require larger transistors because larger cell area can guarantee a larger channel area.

Toshiba has developed a multi-bit cell that uses twice the area of ​​a standard single-layer cell, successfully expanding the channel width in cell transistors by a factor of three. This also tripled the current characteristics of the cell and did not change the storage capacity per area. It reduces the impact of manufacturing changes by 42%.

It has also developed a MROM cell using a 40nm generation process and plans to deliver SoCs for digital applications deploying the cell in 2014.

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